| 摘要 |
PURPOSE:To reduce power consumption without requiring a memory having large storage capacity by deciding a range, to which the phase of a modulated signal belongs, based on a binary signal and outputting the representative value of this range as a phase data for a phase data decision circuit in the delay detection circuit. CONSTITUTION:A phase data converter 44 is a circuit for converting a 4-phase PSK modulated signal, which is fetched from an input terminal 12, to a 8-phase data. A subtracter 28 is connected to a frequency error corrector 32. A decider 34 is a circuit for deciding 1 and 0 data based on a phase difference signal which frequency error is corrected by the frequency error corrector 32. Then, a frequency error detection circuit 40 is provided to detect frequency error based on the outputs of a frequency error correcting circuit 38 and of the decider 34, and an average circuit 42 is provided to average the output of the frequency error detection circuit 40 and to supply a corrected amount to the frequency error correcting circuit 38. |
