发明名称 Data processing apparatus and power supply therefor.
摘要 <p>The present off/on delay circuit operates within the power supply of a microcomputer system to interrupt transfer of regulated DC voltage to the system microcomputer and attachments in respect to indications of power disturbance and system switch status produced in the supply. Upon termination of such indications, this circuit selectively delays reappearance of regulated DC voltage to the level required for system operation so that whenever the microcomputer resets, the attachments must also reset; thereby preventing lockout impasses in the system rebooting process. The circuit operates in response to a plurality of DC voltage indications in the power supply, including at least an indication distinguishing the state of AC source power as either good or bad, and an indication distinguishing the state of a manually operable system power switch as either on or off. In one embodiment, the delay in reappearance of regulated DC operating voltage is chosen to be either relatively fast or slow depending upon how long the system operating voltage has been deactivated. Thus, the slow delay is chosen so as to effectively lengthen the effects of short duration outages or disturbances sufficiently to preclude lockout. <IMAGE></p>
申请公布号 EP0473271(A2) 申请公布日期 1992.03.04
申请号 EP19910306577 申请日期 1991.07.19
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ALLARD, DAVID JOSEPH;RIGGIO, SALVATORE RICHARD, JR.
分类号 G06F1/24;G06F1/26;G06F1/28;G06F1/30;H02H3/00;H02J9/06 主分类号 G06F1/24
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