发明名称 |
Programmable unit having plural levels of subinstruction sets where a portion of the lower level is embedded in the code stream of the upper level of the subinstruction sets |
摘要 |
A processor has two levels of subinstructions, each stored in its own memory with the lower level memory containing only a limited set of such lower level instructions with the rest of the lower level instructions that are desired to be used being supplied by the code stream from the upper level memory.
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申请公布号 |
US4975837(A) |
申请公布日期 |
1990.12.04 |
申请号 |
US19880256169 |
申请日期 |
1988.10.07 |
申请人 |
UNISYS CORPORATION |
发明人 |
WOODWARD, THOMAS R.;MCCOACH, DAVID D. |
分类号 |
G06F9/22;G06F9/26;G06F9/318 |
主分类号 |
G06F9/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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