| 摘要 |
PURPOSE:To increase charge storing amount without increasing cell size, by making a bit line penetrate a capacitor lower electrode via an insulating film. CONSTITUTION:A first capacitor lower electrode 7A and a second capacitor lower electrode 7B are electrically connected, and a part of them is formed in a self-alignment manner. A bit line 9 penetrates the capacitor lower electrodes via a silicon oxide film. That is, the surface of the second capacitor lower electrode is oxidized to be about 100Angstrom thick, thereby forming a capacitor insulating film 13. Polycrystalline silicon of 3000Angstrom in thickness is formed on the whole surface and turned into a capacitor upper electrode 14. In this manner, the capacitor lower electrode can be arranged on the bit line 9, and further the bit line 9 can be formed on the connection region of a diffusion layer 5 and a first capacitor lower electrode 7A, so that the area of the capacitor lower electrode can be increased without enlarging the cell size. |
