| 摘要 |
<p>PURPOSE:To easily and quickly detect the cause of an error by physically and logically monitoring the interconnecting state between a common processing unit and an interface accommodation unit in a time division multiplexer. CONSTITUTION:Interface accommodation units 11-1-11-n are connected respectively to demultiplexer circuits 15-1-15-n in a common processing unit 14 via interconnection cables 13-1-13-n. Logical connection state discrimination information sets 17-l-17-n and bus connection state discrimination information sets 18-1-18-n are outputted respectively from the demultiplexer circuits and inputted to a central processing unit(CPU) 21 via an interface circuit 19. Thus, the interconnecting state between the units is physically and logically monitored. Then mis-connection or no-connection among the units is early found out and the maintenance of the system is quickened and facilitated.</p> |
