VERFAHREN ZUM BETRIEB EINER FEHLERGESICHERTEN HOCHVERFUEGBAREN MULTIPROZESSOR-ZENTRALSTEUEREINHEIT EINES VERMITTLUNGSSYSTEMES.

摘要

The controller has a number of central processor (CP,10C) and a central memory (CMY) coupled in parallel to a central bus system (B:CMYO;B:CMY1). The processors (CP,10C) employ parallel processing units (PU) and a fault recognition circuit (V) using a function checking programme held in a local memory (LMY). Each respective processor (CP) is uncoupled from the bus system (B:CMY0;B:CMY1) upon detection of an operating fault with initiation of a fault diagnosis programme via the processing units (PU).