| 摘要 |
PURPOSE:To reduce the occupied area and power consumption of an integrated circuit by using one gate array so as to execute multiplex processing of a parallel signal and demultiplex processing of serial data bus information into a parallel signal. CONSTITUTION:Multiplex and demultiplex processing are executed by one and same gate array. That is, an output of a multiplex/demultiplex address counter 31 is acted to an output read shift register 2 to be operated at the rise of a clock acted to a write shift register 22 to be operated at the fall of the clock with an inverter inserted in a write clock line. An information output to a data bus is operated at the rise of the clock and an information input from the bus is operated at the fall of the clock, then the multiplex/ demultiplex circuit functions without any hindrance even in the case of the same data bus. Thus, the occupied area of the element is small and the power consumption is decreased. |
