| 摘要 |
PURPOSE:To attain stable operation of a succeeding circuit without malfunction under the broad operating condition such as power supply voltage by changing the time ratio of the H level to the L level of a clock signal corresponding to the power supply voltage. CONSTITUTION:The signal of L level is inputted to a control terminal D, the output inhibition of NOR gates 29 and 210 is released, the pulse width of the clock signal is narrowed by giving a delay to the leading of NOR gates 211, 21 with signals 2n, 2m having a prescribed period of delay formed by an inverter 25 and a capacitor C4 and an inverter 28 and a capacitor C3, the duplication of simultaneous H level for clock signals 2f, 2g is eliminated so as to prevent the malfunction of the succeeding circuit. Although the pulse width is narrowed in this case, the operating speed of the circuit is quickened with a high power supply voltage under the condition of mulfunction with overlapping of simultaneous H level of the clock for a short time, and the circuit is operated sufficiently normally even with a narrow pulse width of the clock signal. |
