MANUFACTURING METHOD OF HIGHLY INTEGRATED DRAM CELL

摘要

The method for securing a sufficient capacitance in a limited area of a DRAM cell with a stacked capacitor and a trench capacitor, comprises the steps of growing and depositing a mask layer (2) onto a P type semiconductor substrate (1) to determine a trench forming portion and etch that portion to form a trench; depositing and etching a boron silic glass layer (3), depositing a low temp. oxide layer (4) and performing a drive-in process to form a P+ doping layer (5) on a wall of the trench; and removing the BSG (3) and LTO (4) and performing rounding oxidation, oxide film removing, trench capacitor oxide film growing process, poly layer (7) deposit and etch-back processes to form a trench capacitor dielectric layer (6).