| 摘要 |
PURPOSE: To conduct hierarchical motion analysis with high cost effect by using a hardware means. CONSTITUTION: A 1st hardware means including conventional image pyramid stages (406-1, 406-n) of a given number and a 2nd hardware means including motion vector stages (416-1, 416-n) by this invention of the same number are operated together to minimize the system processing delay and/or the hardware structure in use thereby conducting the HMA with a high cost effect in real time. That is, the 1st and 2nd hardware means respond to image data with a comparatively high resolution received from image data frames with a series of given continuous pixel density in a traveling wave caused at a comparatively high frame frequency and provide a system processing delay to the data and extract continuous vector data frame outputs with a series of given pixel density in a traveling wave caused at the same frame frequency. Each vector data frame represents a motion of an image caused between pairs of the continuous image frames. |
