发明名称 MICROCOMPUTER
摘要 <p>PURPOSE:To decrease the data processing time by a memory bank switching operation by providing memory bank designating registers by the number corresponding to the number of register banks, and switching the memory bank by only switching the register bank. CONSTITUTION:When an interruption request is generated, '00', '11', '10' and '11' are set to memory bank designating registers #a5, #b6, #c7, and #d8, respectively by initialization. First of all, in a main routine, '00' is set to a register bank designating register 9, and since the register bank #a1 and the register #a5 are '00', a memory bank #0 is designated as an access memory area and the processing is executed. As a result, a superordinate address generating circuit 13 outputs MA9, MA8=00, a subordinate address generating circuit 12 outputs MA7 - MA0 = 01101100, and an access is executed to a memory address '06CH' address.</p>
申请公布号 JPH0454652(A) 申请公布日期 1992.02.21
申请号 JP19900165911 申请日期 1990.06.25
申请人 NEC CORP 发明人 FUJIMURA SAYURI
分类号 G06F12/00;G06F9/30;G06F9/355;G06F9/46;G06F9/48;G06F12/06;G06F15/78 主分类号 G06F12/00
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