发明名称 PERIPHERAL CONTROLLER
摘要 <p>PURPOSE:To eliminate the need of a different control circuit for wait at the time of executing an access to a low speed memory or a low speed register by instructing a clock period from a microprocessor circuit, and setting it as a necessary clock period. CONSTITUTION:A clock control circuit 11 is provided, a clock period of a clock circuit 12 is converted, based on an instruction of a microprocessor circuit 10, and by a clock of this circuit 11, the circuit 10 controls a superordinate interface circuit 13 and a subordinate interface circuit 14. In such a state, at the time of executing an access of a low speed memory or a low speed register, in such a way, a clock is converted to a low speed in the circuit 11 by an instruction of the circuit 10, therefore, the access can be executed without executing an instruction of wait to the circuit 10.</p>
申请公布号 JPH0454615(A) 申请公布日期 1992.02.21
申请号 JP19900164743 申请日期 1990.06.22
申请人 NEC CORP 发明人 SUZUKI CHIKARA
分类号 G06F13/12;G06F1/08 主分类号 G06F13/12
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