发明名称 CLOCK CONTROLLER
摘要 <p>PURPOSE:To actuate a system at the highest speed by providing a means which divides the frequency of an operating clock based on the division value outputted from a division value output means which outputs the prescribed division value in response to each access cycle of plural devices. CONSTITUTION:A division value output circuit 3 outputs the division value nK for each device 7 to receive an access from a CPU 4. A division circuit 2 divides an operating clock to be applied to the CPU 4 based on the value nK. Thus the frequency of the operating clock of the CPU 4 is varied in response to the access time of each of plural devices to receive the accesses from the CPU 4. Then the useless action waiting time can be eliminated for plural devices 7 having different access cycles. As a result, a system is actuated at the highest speed and the system performance is improved.</p>
申请公布号 JPH0452713(A) 申请公布日期 1992.02.20
申请号 JP19900156097 申请日期 1990.06.14
申请人 RICOH CO LTD 发明人 IJICHI KAZUHIRO
分类号 G06F1/08 主分类号 G06F1/08
代理机构 代理人
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