发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To surely generate a pulse by providing a capacity, a current control means which charges the capacity, a voltage detecting means which is controlled b a signal reporting the charged state of the capacity, and a latch means where charging of the capacity is held. CONSTITUTION:A pulse generating circuit consists of a capacity 1, a current control means 2 which charges the capacity 1, a voltage detecting means 3 which is controlled to the operation active state or the operation stop state by the signal reporting the charged state of the capacity 1 and controls the current control means 2, and a latch means where the charged state of capacity 1 is held. Consequently, charging of the capacity 1 is not started in the case of a relatively low voltage even if the rise of the voltage is slow, and the pulse is surely generated; and after the pulse is generated, a voltage detecting means 5 is set to the stop state to eliminate the current consumption. Thus, the pulse is surely generated independently of the rise speed of the supply voltage without increasing the current consumption at all.</p>
申请公布号 JPH0452916(A) 申请公布日期 1992.02.20
申请号 JP19900163521 申请日期 1990.06.20
申请人 SEIKO INSTR INC 发明人 UEDA CHIHARU
分类号 G06F1/24;H03K17/22 主分类号 G06F1/24
代理机构 代理人
主权项
地址