发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To speed up read-out operation, and to shorten its access time by providing a separate repeating circuit at the preceding stage of a main amplifier arranged at a comparatively long distance from a memory array. CONSTITUTION:A dynamic RAM is constituted basically of a pair of memory arrays MARYL and MARYR arranged across a sense amplifier SA. The main amplifier MA is arranged at a comparatively long distance from the sense amplifier SA, i.e. the memory arrays MARYL and MARYR. Besides, the separate repeating circuit SRC is arranged in the neighborhood of the sense amplifier SA so that the wiring length of a complementary common data data line CD from the sense amplifier SA to the separate repeating circuit SRC is sufficiently short. The separate repeating circuit SRC includes a pair of channel MOSFETs Q4 and Q5. The MOSFETs Q4 and Q5 act as what is called a capacity cut MOSFET.
申请公布号 JPH0449594(A) 申请公布日期 1992.02.18
申请号 JP19900157573 申请日期 1990.06.18
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 SAITO HIROMI
分类号 G11C11/409;G11C11/417;H01L21/8242;H01L27/108 主分类号 G11C11/409
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