发明名称 CLOCK HOLDOVER CIRCUIT
摘要 OF THE PRESENT INVENTION The present invention provides a clock holdover circuit which will provide a replacement clock signal within predetermined parameters independently of time and temperature variations. The circuit of the present invention has only a single component which is time and temperature dependent. By selecting the components parameters to be within the desired tolerances, the accuracy of the circuit is maintained. In the present invention, digital circuitry is combined with an accurate local crystal frequency source to provide a replacement clock signal. The present invention allows phase consistency upon loss of a reference clock signal as well as on return of the reference clock signal. A reference clock signal is phase locked to a VCO to produce a desired output. The frequency of the output is compared to a local frequency standard to generate an offset frequency used to control a frequency synthesizer. The offset frequency is digitally stored. Upon loss of the reference clock signal, the stored offset frequency is used to drive the frequency synthesizer along with the local frequency standard so as to provide an acceptable replacement clock signal. The frequency comparator, storage, and synthesizer are all digital so as to be time and temperature independent. The local frequency standard is crystal based having known time and temperature tolerances. By choosing a local frequency standard having tolerances within a predetermined range, an acceptable clock holdover signal may be provided indefinitely. The replacement clock signal is phase compared to the reference clock signal so that no loss of phase occurs upon reference loss.
申请公布号 CA1296073(C) 申请公布日期 1992.02.18
申请号 CA19890588997 申请日期 1989.01.24
申请人 SILICON GENERAL, INC. 发明人 JOHNSON, STEVEN D.;WARREN, TONEY
分类号 H04L7/08 主分类号 H04L7/08
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