发明名称 SAMPLING CIRCUIT FOR VIDEO SIGNAL
摘要 PURPOSE:To reproduce an original picture excellent by a small-sized device by setting the oscillation frequency of a voltage-controlled oscillator M times that of sampling clock pulses, and by generating the sampling clock pulses by dividing the frequency of its output by M. CONSTITUTION:A voltage-controlled oscillator 3 oscillates at a higher frequency than a video signal frequency, and the frequency of the output signal of the oscillator 3 is divided by a counter 4; and the output signal of the counter 4 and a horizontal synchronizing signal included in a TV signal are compared mutually by a phase detector 1 to obtain an output signal which corresponds to the phase. The output signal of the detector 1 is supplied via an LPF2 to the oscillator 3 to constitute a phase-locked loop PLL. Further, a counter 7 reset to a constant value with the horizontal synchronizing signal is provided, and this counter 7 divides the frequency of the output signal of the oscillator 3 in the PLL circuit to generate sampling clock pulses 6 of a frequency equal to that of a video signal.
申请公布号 JPS5720074(A) 申请公布日期 1982.02.02
申请号 JP19800094023 申请日期 1980.07.11
申请人 HITACHI LTD 发明人 HAKOYAMA AKIYOSHI
分类号 G06F3/12;G06K15/12;H04N5/92 主分类号 G06F3/12
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