发明名称 CONTENTION CONTROL CIRCUIT FOR MEMORY ACCESS
摘要 <p>PURPOSE:To increase the system generating range which is shared by the memory devices by shifting the access timing set to a memory device of a 1st processor from the access timing set to a memory device of a 2nd processor by an extent equal to a fixed number of clocks. CONSTITUTION:This contention control circuit consists of the signal input parts 11 - 15, the signal output parts 16 - 19, a decoder 21, the D type flip-flops 22 - 26, the inverters 30, 35 and 39, the AND gates 31 and 36, the OR gates 32, 33, 37, etc. Then the actual access timing set to a shared memory device of a 1st processor which can secure a waiting state with a ready signal is shifted form the access timing of a 2nd processor which is unable to secure a waiting state by means of the address latch enable signal and the basic clock signal of the 2nd processor. Thus a memory sharing system is constructed with satisfactory control of the contention and the system generating range can be extended for sharing the memory devices.</p>
申请公布号 JPH0448353(A) 申请公布日期 1992.02.18
申请号 JP19900157601 申请日期 1990.06.18
申请人 OKI ELECTRIC IND CO LTD 发明人 ABE HIROSHI
分类号 G06F15/16;G06F9/52;G06F12/00;G06F15/177 主分类号 G06F15/16
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