High-speed low-power ECL/NTL circuits with AC-coupled complementary push-pull output stage

摘要

High-speed low-power emitter coupled logic (ECL) and non-threshold logic (NTL) circuits are disclosed wherein an ac-coupled complementary push-pull output stage is utilized. The circuits utilize two capacitors to couple an ac-pulse derived from a replica of an input signal to the bases of the complementary PNP-NPN push-pull transistors to provide a large transient current, thus realizing high-speed operation with very low dc power dissipation. The coupling scheme allows a very low switch current to be used for the logic (current switch) stage to maintain the proper logic levels while avoiding the impact on the switching speed by the large pull-up resistors of the logic stage.