发明名称 SERIAL INPUT/PARALLEL OUTPUT MEMORY CIRCUIT
摘要 PURPOSE:To enable a high-speed operation by parallelly outputting data to be serially inputted for every N number of data. CONSTITUTION:The data is read out by reading it out from data output lines 161-16N and after completely reading it out, a signal at a 1 level is inputted from a control line 174 for output. Continuously, when the control line 174 for output is turned to a 0 level and a state memory 13N+1 in set in the state of data presence, namely, in the state of Q=1, an operational state is set and the transfer of the data is started similarly to a conventional example and turned to a standstill state when the transfer of N steps is completed finally.
申请公布号 JPH0444699(A) 申请公布日期 1992.02.14
申请号 JP19900151909 申请日期 1990.06.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUGITANI TOSHIYUKI;YAMASHITA HIDEHIRO
分类号 G11C19/00;H03M9/00 主分类号 G11C19/00
代理机构 代理人
主权项
地址