| 摘要 |
<p>PURPOSE:To reduce both the production cost and the power consumption by providing plural cell generating circuits which sends selectively the generated cells to one of plural buses and a time division multiplexing circuit which multiplexes in time division those cells received from the cell generating circuits. CONSTITUTION:When the data of 12 bytes are stored in a cell generating circuit 12-1, the cells consisting of the 12-byte data are sent every byte to a byte multiplexing/parallel-serial conversion circuit 17 via a bus 16A. In the same way, the 12-byte data are sent to the circuit 17 via a bus 16C when the 12-byte data are stored in a cell generating circuit 12-2. Then the circuit 17 switches successively the buses 16A - 16D based on the clocks obtained by dividing a transmission clock received from a timing signal generating circuit 18 into eight pieces. Then the cells transferred via the buses 16A - 16D undergo the multiplexing of bytes, that is, undergo the time division multiplexing in the form of the 8-bit parallel signals. Then the bytes of these cells are interleaved, and a serial signal 18 is converted and transmitted.</p> |
