| 摘要 |
<p>The present invention provides methods and apparatus for synchronous detection of a Frequency Shift Keying (FSK) signal. The demodulation of the FSK signal is performed in the "complex plane" after multiplying the input samples by an unlocked complex carrier in a complex down converter. Two decision bits are generated per real bit. Once bit should be the real decision; the other bit is a "transition" bit between two Bauds. To generate this situation, the last three decisions are considered. If a transition from 0 to 1, or vice-versa, occurs between the first and third bit, then the middle (second) bit should have equal probability to be 0 or 1. If it is 1, timing correction, by moving the sampling window, is done towards the 0 bit. If it is a 0, the sampling window is moved toward the 1 bit. The timing decision is efficiently implemented by taking the three bits as an index to an 8-entry look-up table that generates ADVANCE, DELAY or NO_OP directions. <IMAGE></p> |
