| 摘要 |
PURPOSE:To accelerate a processing operation by deciding the logic of an output bit signal corresponding to the logical state of each bit signal on the side of low order rather than the bit signal to be processed. CONSTITUTION:When converting a binary data '1011' of four bits expressed by the complement of '2' to a positive binary data, among the binary data '1011' inputted to input terminals 1a-1d, the least significant bit signal is passed through a signal line 10 and outputted from an output terminal 4a as it is and since there is '1' in the input bit signal on the low-order side concerning the other high-order bits, all the bit signals are inverted and outputted. Therefore, the binary data '0101' converted to positive values are outputted to output terminals 4a-4d. When the binary data are inputted to input terminals 1a-1n, the logic of each bit signal in the converted binary data is immediately decided. Therefore, there is no carry delay, and the high-speed operation can be achieved. |
