| 摘要 |
PURPOSE:To prevent the occurrence of a difference between delay time to the output of a TRUE signal and delay time to the output of a BAR signal by providing the buffer of CMOS for an opposite phase output circuit. CONSTITUTION:When an input signal S1 is inputted to an input terminal T1, the TRUE signal ST is outputted through the invertors I1 and I2 of a TRUE signal output circuit 1 and the BAR signal SB is outputted through the buffer 3 and the invertor I3 of a BAR signal output circuit 2. The number of logical stages from the input terminal T1 to the output of the TRUE signal and that to the output of the BAR signal are set to be same two stages and signal delay time is set to be similar. Thus, there is no difference between the output of the TRUE signal and that of the output of the BAR signal. |
