| 摘要 |
PURPOSE:To measure the passing density of a packet corresponding to a logical channel even if the speed of a data line becomes considerably high by providing packet density memory holding the measurement value of the time interval of the packet for respective logical channels. CONSTITUTION:When the packet passes on a data line 1, a logical channel identification circuit 2 takes out a logical channel number and outputs it to an associative memory control circuit 6 and a memory control circuit 13. When the given logical channel number exists within a packet hysteresis memory 9, the associative memory control circuit 6 outputs a coincident address signal 10 to a subtraction circuit 11, which subtracts the coincident address signal 10 from a count signal 5, obtains the time interval between two packets and outputs it to the memory control circuit 13. It writes a smaller value between time difference information and past time difference information obtained from the packet density memory 16 into the packet density memory 16. Thus, the passing density of the packet can be measured corresponding to the logical channels even if plural packets continue.
|
