Arithmetic and logic units.

摘要

An arithmetic and logic unit implemented in a memory array is provided. The memory has a plurality of memory cells each with a memory storage element and each accessible via a word line and at least one bit line. The arithmetic and logic unit comprises a plurality of logic circuits coupled to the word and bit lines in place of the memory storage elements of certain memory cells. Each of the plurality of pull down logic circuits implements an arithmetic and/or logic function. <IMAGE>