发明名称 |
Circuit arrangement for decimal arithmetic |
摘要 |
A circuit for performing decimal subtraction at high speed has an execution time which is independent of the existence of a borrow condition. The subtraction circuit is particularly suited for use in microcoded computer circuits.
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申请公布号 |
US5086406(A) |
申请公布日期 |
1992.02.04 |
申请号 |
US19900544863 |
申请日期 |
1990.06.28 |
申请人 |
NEC CORPORATION |
发明人 |
OKUGAWA, SHINICHI;SUGIMOTO, SHIGENOBU |
分类号 |
G06F7/494;G06F7/50 |
主分类号 |
G06F7/494 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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