| 摘要 |
PURPOSE:To execute a processing at high speed and to generate multiple synthesis patterns without increasing the types of the patterns by giving an image memory and a pattern memory and executing the parallel processing of an image and the patterns. CONSTITUTION:The image a1 and the pattern b1 are stored in a disk 18. CPU 19 reads the image a1 and the pattern b1 from the disk 18 and stores them in the image memory 11 and the pattern memory 12. A memory control part 13 simultaneously reads bit data from corresponding addresses in the memories 11 and 12 and outputs them to an AND gate 14. The output of the gate 14 is position-adjusted in an image position adjustment circuit 15, is ORed with data stored in a page buffer 17 in an OR circuit 16 and is stored in the buffer 17. Namely, data of the buffer 17 is zero at first and the synthesis pattern obtained by ANDing the image a1 and the pattern b1 is stored. |
