发明名称 OUT OF CLOCK SYNCHRONISM DETECTION CIRCUIT
摘要 PURPOSE:To surely detect out of synchronism and to avoid a large sized circuit scale by generating a clock from a data and making a change point of a recovered clock and that of a generated clock coincident with each other. CONSTITUTION:When a demodulated binary data is supplied to an input terminal 1, a recovered clock is obtained from an output terminal 19 and when the data speed is changed and the phase allowable range of the recovered clock is exceeded, an H level pulse is caused in an output signal (5) of a D flip-flop(D- FF) 10 and the output signal (6) of a monostable multivibrator 11 goes to an L level, then an LED 20 is lighted and the output signal (6) goes to an L level and is outputted from the output terminal 5, then out of synchronism is informed. Thus, suitable phase out of synchronism is detected independently of a temperature change and large sized circuit scale is waded.
申请公布号 JPH0432316(A) 申请公布日期 1992.02.04
申请号 JP19900137166 申请日期 1990.05.29
申请人 TOSHIBA CORP 发明人 OI TOSHIHIKO
分类号 H03L7/095 主分类号 H03L7/095
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