| 摘要 |
PURPOSE:To prevent the deterioration in the transmission efficiency by sending a parallel signal bit by bit sequentially and serially to an external transmission line according to a timing signal sent with the input of a parallel signal. CONSTITUTION:A data stored in an address designated in a memory 2 by DMA transfer or interruption processing is read in the unit of 8 bits, i.e., in the unit of one byte and sent to a P/S(parallel/serial) conversion circuit 6 via a data bus 3. The P/S conversion circuit 6 sends a data bit by bit to an external transmission line resident based on a timing signal sent from a counter 7 or 8 to make serial transmission. Thus, the transmission speed is improved by the simplyfication of the input processing. |
