发明名称 INSULATED GATE BIPOLAR TRANSISTOR
摘要 PURPOSE:To enable a bipolar transistor to carry out a high speed switching operation without increasing it in conduction resistance by a method wherein a fourth region is composed of a deep part whose base is distant from a collector electrode contact surface and a second conductivity type shallow part low in impurity concentration. CONSTITUTION:A P layer (fourth region) 8 is composed of a shallow P layer 81 and deep P layers 82. The layer 81 sandwiched between the layers 82 is periodically formed in band, and when electrons stored in an N<-> layer 1 penetrate the layers 82, the correspondent holes are injected into the layer 1 from the layers 82 when a bipolar transistor is turned ON, and as a barrier is provided between the layer 81 and the layer 1, the injection of holes from the layers 82 into the layer 1 is accelerated. The surface impurity concentration of the layer 82 is set much lower than that of the layer 81,whereby holes are restrained from being injected into the layer 1 from the layer 81 so as not to make the stored carriers excessive. As a PN junction formed between the layers 81 and 1 can be further lessened in junction potential, carriers can be more effectively discharged when a bipolar transistor is turned OFF. In result, a bipolar transistor can be improved in a high speed switching operation keeping low in conduction resistance.
申请公布号 JPH0430476(A) 申请公布日期 1992.02.03
申请号 JP19900136107 申请日期 1990.05.25
申请人 FUJI ELECTRIC CO LTD 发明人 NISHIURA AKIRA
分类号 H01L29/78;H01L29/739 主分类号 H01L29/78
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