发明名称 PLA CIRCUIT
摘要 <p>PURPOSE:To simplify configuration by providing one piece of an AND array in common for plural pieces of OR arrays, and selecting the output group of the AND array to be inputted to each OR array by an operation mode selecting signal. CONSTITUTION:The OR array part ORs of a PLA (Programmable Logic Array) are provided in number equal to the number (n) of required mode control signals S1 to Sn, and only one AND array part AND is provided in common for n-pieces of the OR array parts. If the OR array part OR of the PLA1 to output the mode control signal S1 requires L1-pieces of the outputs of the AND array, and similarly, the OR array part ORs of the PLA2 to PLAn to output S2 to Sn requires L2 to Ln-pieces of the outputs of the AND array, the AND array part AND is made to generate remaining L-pieces of the outputs excepting the common one among L1 to Ln-pieces. Then, M-pieces of input signals Sin required for generating L-pieces of these outputs are inputted to the AND array part AND, and the outputs L1,L2...Ln of the AND array to be inputted to each OR array part are selected by the operation mode select signal SS. Thus, the configuration can be simplified.</p>
申请公布号 JPH0430277(A) 申请公布日期 1992.02.03
申请号 JP19900135987 申请日期 1990.05.25
申请人 FUJITSU LTD;FUJITSUU DEBAISU KK 发明人 TANAKA YASUHIRO
分类号 G06F15/78;H01L21/82 主分类号 G06F15/78
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