发明名称 RESET CIRCUIT
摘要 <p>PURPOSE:To secure an operation at the time of hitting by inputting one output from an output port to an input port, supervising an output signal level and resetting input/output ports when a supervisory result is abnormal in a communication controller consisting of a processor and peripheral input/output ports. CONSTITUTION:A one shot circuit 5 for resetting the output port 11, and the input port 12 is provided. The output signal 8 of the output port 11 is set to be one input of the input port 12. When a power supply hits and the power supply voltage is restored to the normal one, the processor 10 controls the output signal 8 and inputs the output to the processor 10 through the input port 12. The processor 10 decides the signal level. When it is not normal, a trigger signal 9 is supplied to the one shot circuit 5. It generates the reset signal 6 and initializes the output port 11 and the input port 12 by a port reset signal 7 through an OR gate 20.</p>
申请公布号 JPH0425916(A) 申请公布日期 1992.01.29
申请号 JP19900131801 申请日期 1990.05.22
申请人 NEC CORP 发明人 ONO TATSUHIRO
分类号 G06F1/24 主分类号 G06F1/24
代理机构 代理人
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