| 摘要 |
<p>A barrel shifter comprises an alignment circuit formed from two cell arrays (6a and 6b) comprising registers (A0 to A7 and B0 to B7) provided in series for receiving a 2n-bit data row as input and outputting one n-bit data row as one item of data and another n-bit data row as one item of data shifted by n bits aligned in a predetermined arrangement; and a selector group (13 to 16) wherein the shift data (basic data) is input, the basic data is shifted by k-bits only (where k < n), and the k-bit shifted data is output, or, the basic data is output without modification, wherein the selector group (13 to 16) comprises a plurality of stages, each of the stages comprises n+k selectors and the bit data row output from each stage is input to the subsequent stage, the selectors of 0 to (n-1) bits in each stage for shifting k bits (where k < n) is provided, corresponding to 0 to (n-1) bits of data in the alignment circuit, and the selectors of n to (n-1+k) bits in each stage are separated by k bits from the corresponding selectors of 0 to (n-1) bits in the stage, respectively. <IMAGE></p> |
