| 摘要 |
PURPOSE:To always obtain a correct decoding data by discriminating it to be an abnormal clock in a clock recovery circuit when a decoding rule violation is detected for a prescribed time so as to use a reset circuit, thereby resetting the clock recovery circuit. CONSTITUTION:The clock recovery circuit 2 extracts a clock frequency of a biphase input data and inputs it to a decoder 1 and a decoding rule violation detection circuit 3. When the clock recovery circuit 2 is locked at an abnormal frequency, since the biphase input data and a clock outputted from the clock recovery circuit 2 are not synchronized with each other, a decoding rule violation detection signal is outputted from the decoding rule violation detection circuit 3. A timer circuit 4 counts the output time of the decoding rule violation detection signal, compares it with a reference time and when the counted time is long, a reset instruction is outputted to a reset circuit 7. The reset circuit 7 resets the clock recovery circuit 2 to allow it to be locked at a correct frequency, thereby outputting a correct decoding data. |
