| 摘要 |
PURPOSE:To apply phase lock smoothly and quickly by setting three kinds of input clocks or above and selecting a least phase difference with an output clock outputted at present when the input clock being a reference to a clock outputted at present is interrupted. CONSTITUTION:With three kinds of input clocks f1, f2, f3 inputted, the phase of them is compared with the phase of an output clock f0 at a current point of time at phase comparator circuits 1a, 1b, 1c and phase difference voltages DELTAVf1, DELTAVf2, DELTAVf3 are inputted to a phase difference voltage selecting circuit 2. If the input clock f1 is interrupted in the selective circuit 2, the phase difference voltage DELTAVf2, the input clock f3 and DELTAVf3 are compared and a signal with a smaller phase difference is selected. Then the input clock with the smaller phase difference is used as a succeeding reference clock. Thus, a remarkable phase shift in the output clock at the switching of the input clock is prevented and the phase locked state is formed quickly and smoothly. |
