发明名称 MICROPROCESSOR
摘要 <p>PURPOSE:To execute the access in the minimum time with respect to plural devices whose access time is different by receiving an address updating permitting signal from a peripheral equipment control means, and executing address updating in accordance with this permitting signal CONSTITUTION:When a bus cycle request is generated, an address is generated, and also, whether an address updating permitting signal 102 from a peripheral equipment control means 2 is effective or not is confirmed. When the signal is effective, the generated address is loaded to an address register 4, and subsequently, whether a bus cycle is being executed at present or not is confirmed and when the bus cycle is not being executed, the loaded address is sent out. When the bus cycle is being executed, its end is awaited. In such a way, the access is executed in the minimum time with respect to plural devices whose access time is different.</p>
申请公布号 JPH0421054(A) 申请公布日期 1992.01.24
申请号 JP19900123736 申请日期 1990.05.14
申请人 NEC CORP 发明人 OKUGAWA SHINICHI
分类号 G06F13/42;G06F15/78 主分类号 G06F13/42
代理机构 代理人
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