发明名称 PASSIVE TERTIARY PLL LOOP FILTER
摘要 PURPOSE: To improve the stability of a loop and the response characteristic of the loop in a mound at modulating time by dividing a resistor of a lag-lead secondary form into two resistors and adding a capacitor in parallel between the two parts. CONSTITUTION: A phase locked loop(PLL) system is composed of a loop filter 2 which integrates phase error signals Vc (t) and supplies the integrated signals to a voltage-controlled oscillator 3, a programmable divider 4 which controls a feedback parameter N, and the oscillator 3. In the PLL system, the resistor of the lag-lead secondary type loop filter 2 is divided into a first resistor R1 and a second resistor R2 and a first capacitor C1 is formed in parallel with the resistors R1 and R2 between the resistors R1 and R2 . In addition, a third resistor and a second capacitor C2 connected in series with the third resistor are connected in parallel with the other end of the second resistor R2 . Therefore, the stability of a loop can be stabilized and the response characteristic of the loop in a modulating band can be flattened.
申请公布号 JPH0418813(A) 申请公布日期 1992.01.23
申请号 JP19900315269 申请日期 1990.11.20
申请人 HIYUNDAI EREKUTORONIKUSU IND CO LTD 发明人 CHIYAN HIYUN PAKU
分类号 H03L7/093;H03H11/00 主分类号 H03L7/093
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