发明名称 Integrated semiconducting circuit interface for central processor - contains single port memories with random interval and FIFO external access
摘要 An integrated semiconducting circuit, which acts as the external interface of a central processor, contains a number of single-port memories (14,16) for reading and output of data written by the central processor (10) and with the memory capacity to store the data exchanged between the central processor and exterior. The single port memories are randomly accessed by the central processor via a random access device (25) and are accessed by external equipment in a first-in-first-out mode via a serial access device (21). USE/ADVANTAGE - Making connections between systems. Integrated circuit interface reduces load on central processor and occupancy time of system bus for data transfers.
申请公布号 DE4122831(A1) 申请公布日期 1992.01.23
申请号 DE19914122831 申请日期 1991.07.10
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 NAKABAYASHI, TAKEO;KONDOH, HARUFUSA, ITAMI, HYOGO, JP
分类号 G06F15/16;G06F13/28;G06F13/38 主分类号 G06F15/16
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