发明名称 |
A/D CONVERSION CIRCUIT FOR TELEVISION SIGNAL |
摘要 |
PURPOSE:To prevent an interface line between an analog processing part and a digital processing part from increasing and to facilitate the design of a circuit as against a clamping characteristic by reduction-correcting a difference between the pedestal level value of an input television signal and a prescribed pedestal level value in a digital processing after A/D conversion. CONSTITUTION:An error correction circuit 18 is connected between an A/D converter 12 and a filter circuit 14 and a part of an output from the A/D converter 12 is fetched from the output-side of the A/D converter 12 as a digital clamping circuit by which an error is corrected on the output-side of the A/D converter 12. Consequently, the difference between the pedestal level value of the input television signal and the prescribed pedestal level value is reduction- corrected by the digital processing after A/D conversion without feeding it back to the analog processing part before A/D conversion. Thus, the interface line between the analog processing part and the digital processing part is prevented from increasing and circuit design against the clamping characteristic can be facilitated. |
申请公布号 |
JPH0418863(A) |
申请公布日期 |
1992.01.23 |
申请号 |
JP19900121110 |
申请日期 |
1990.05.14 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
NISHIMURA SHINJI |
分类号 |
H04N5/14;H04N5/00;H04N5/16 |
主分类号 |
H04N5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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