| 摘要 |
PURPOSE:To greatly improve step coverage of a bit line of a contact hole part, and to improve reliability of a semiconductor memory by bringing the line into contact with a second conductive layer, and largely alleviating the step of the hole part. CONSTITUTION:A power line 19 is passed between adjacent word lines WL and WL', bit lines BL,-BL are connected to diffused layers 9, 11 of access transistors Q5, Q6 by bringing repeating wirings 15, 16 connected to the layers 9, 11 into contact with the lines BL,-BL on the transistors of a memory cell. The depths of contact holes C12, C13 for bringing the lines BL,-BL into contact with the wirings 15, 16 are extremely smaller than that of a contact hole used when the lines BL,-BL are brought into direct contact with the layers 9, 11. The steps of the holes C12, C13 are greatly alleviated as compared with a complete CMOS static RAM. |
