发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To apply a voltage to a memory cell backgate, write '0' again to erase the backgate again when there are memories which are depleted during erasure by providing the memory cell with a generating circuit for applying a backgate. CONSTITUTION:When a memory array is erased, first '0' is written to all memory cells, and a threshold value of the member is raised. Thereafter, an erasure voltage is applied to source lines SL1, SL2 by an erasure voltage generating circuit 2, causing the threshold values of all the memory cells to be decreased. When an erasure voltage is erroneously applied without writing '0' before erasure, the memory cell is depleted. If the backgate generation circuit 1 is activated in such a condition and a negative voltage is applied to the boards of all the memory cells, the threshold value of all the memory cells is increased, and a memory b is enhanced, Then, '0' is written again in a state in which the backgate is applied. Thereafter, a negative voltage supplied from the backgate generation circuit 1 is turned to ground level, and an erasure voltage is applied to the source line SL1, SL2 by the erasure voltage generating circuit 2. Thus, erasure of the memory cell is performed ordinarily.
申请公布号 JPH0415958(A) 申请公布日期 1992.01.21
申请号 JP19900120767 申请日期 1990.05.09
申请人 MITSUBISHI ELECTRIC CORP 发明人 KOBAYASHI SHINICHI;TERADA YASUSHI;NAKAYAMA TAKESHI;MIYAWAKI YOSHIKAZU;HAYASHIGOE MASANORI
分类号 G11C16/02;G11C17/00;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C16/02
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