| 摘要 |
PURPOSE:To increase the operating speed of a graphic display by providing an arithmetic processing means, a data transfer destination selection means, and a transfer means using a FIFO for data input which can output a half/full signal. CONSTITUTION:A arithmetic processing part 1 is arranged parallely in a horizontal direction toward a data bus. Input FIFOs 2 are respectively connected to data input parts. By the half/full flag signal outputted by the FIFO, an effective transfer destination selection part 4 selects the destination of the transfer not met in the half/full state as effective. Based on the selection output signal, a distribution control part 3 feeds the data successively until a transfer destination change signal comes to one of the input FIFOs. Thus, the load of the respective arithmetic processing parts can be averaged. Therefore, the throughput of the respective arithmetic processing parts used by horizontally divided can be effectively utilized to increase the speed of the graphic display. |
