发明名称
摘要 The converter includes a digital circuit for adjustment of the analogue output signal shift range. The digital circuit is for adding an analogue signal with a polarity determined by a polarity signal contained in the digital input signal. Two counters repeatedly count synchronously with each other, the first counter being reset by the second. The first counter reading and the digital input signal are compared, and the second counter reading is extracted by the comparator at the instant of coincidence between the first counter reading and the digital input signal. The first counter reset reading can be changed and preset, and the required level shift is digitally carried out.
申请公布号 JPS5711006(B2) 申请公布日期 1982.03.02
申请号 JP19730135518 申请日期 1973.11.30
申请人 发明人
分类号 G01D3/024;G01R17/04;H03M1/00 主分类号 G01D3/024
代理机构 代理人
主权项
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