发明名称 VARIABLE LENGTH DECIMAL SUBTRACTING DEVICE
摘要 PURPOSE:To always ensure a high speed arithmetic processing operation by repeating the arithmetic processing operation for each prescribed digit together with acquisition of the information showing the negative arithmetic result and carrying out a correcting operation according to the presence or absence of the negative information. CONSTITUTION:An arithmetic logic unit ALU 15 contains four subtraction circuits 15a - 15d arranged in parallel with each other. The data to be computed and the arithmetic data which are obtained the variable length data are read out after dividing them every four digits from each lower rank digit. Then the ALU 15 applies repetitively the subtraction to these divided data and at the same time stores the presence or absence of the borrow data to be given to the higher rank digits for each subtraction performed every four digits. If the borrow data is confirmed at the end of the subtraction processing, a negative correcting operation is applied to the result of subtraction. Thus the subtraction processing speed is increased with no application of a new correcting instruction.
申请公布号 JPH047737(A) 申请公布日期 1992.01.13
申请号 JP19900108863 申请日期 1990.04.26
申请人 CASIO COMPUT CO LTD 发明人 ITO MAKOTO;HIRAOKA SHIGEO
分类号 G06F7/50;G06F7/494;G06F7/506 主分类号 G06F7/50
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