发明名称 CODE CONVERSION SYSTEM
摘要 <p>PURPOSE:To condense the maximum continuous number of the same codes and DSV, by using conversion rules provided with three kinds or four kinds modes, in a code converting method which decides the mode of output codes in accordance with the algebraic sum. CONSTITUTION:After continuous 2-bits of an input binary code row 1N are inputted into a series-parallel converting circuit 1 and converted into parallel codes, the 2-bit parallel codes are inputted into a code converting circuit 6 an converted into 3-bit parallel codes by using conversion rules of three kinds modes A-C or four kinds mode A-D. The converted 3-bit parallel codes are outputted after they are converted into series codes by a parallel-series converting circuit 4. Therefore, both maximum continuous number and digital sum variation DSV of the code are reduced and intercode interferences of the receiving waveform are minimized. Moreover, extraction of timing block is made easy.</p>
申请公布号 JPS5737952(A) 申请公布日期 1982.03.02
申请号 JP19800112058 申请日期 1980.08.14
申请人 FUJITSU LTD 发明人 NISHIZAKI KOUJI;ARAI MASANORI
分类号 H03M5/04;H04L7/00;H04L25/49 主分类号 H03M5/04
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