发明名称 DELAY DEVICE
摘要 PURPOSE:To contract the sizes of circuits and to simultaneously obtain the data of plural delay variables by connecting a data shifting means in addition to memory cells arranged in plural rows and an address control means. CONSTITUTION:The delay device has the data shifting means 40 for transferring data read out from each row of the memory cells 1 to 15 arranged in plural rows to the memory cell of the succeeding row. Thereby, the data are successive ly transferred from the 1st row 1 to 5 in the memory cells 1 to 15 arranged in plural rows to the final row 11 to 15, external input data are written only in the memory cells 1 to 5 in the 1st row and external output data are read out only from the memory cells 11 to 15 in the final row, so that the use of an I/O selecting circuit network and a selection control circuit network can be made unnecessary. Consequently, the data of plural different delay variables can be simultaneously obtained from the compact delay device whose circuit size is reduced.
申请公布号 JPH046690(A) 申请公布日期 1992.01.10
申请号 JP19900109034 申请日期 1990.04.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MUGITA TORU
分类号 G11C7/00;H03K5/135 主分类号 G11C7/00
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