| 摘要 |
PURPOSE:To decrease the frame synchronization restoration time by utilizing a pattern characteristic of an auxiliary data so as to generate a timing pulse of the auxiliary data thereby using the pulse pattern as an apparent frame synchronization pattern. CONSTITUTION:An auxiliary data timing generating circuit 2 generates an auxiliary data timing pulse representing a timing of an auxiliary data based on a frame pulse and a clock pulse. An auxiliary data pattern detection circuit 3 generates an auxiliary data pulse based on the auxiliary data timing pulse, a PCM signal and a clock pulse. A synchronization pulse comparator circuit 4 regards the auxiliary data pulse as a frame pulse in addition to the frame pulse, compares the timing with the frame timing pulse and controls the clock pulse given to a timing generating circuit 5 when the result of comparison is dissident to cause hunting in the system. Moreover, the synchronization pulse comparator circuit 4 regards the auxiliary data pulse as the frame pulse and compares its timing with the frame timing pulse to simplify the comparison processing in the normal state when the frame pulse and the frame timing pulse are dissident. |
