| 摘要 |
<p>A microcomputer comprises a CPU and a DMA controller for performing data transfer between a peripheral unit and a memory in response to a data transfer request from the peripheral unit, the DMA controller including first storage means for storing shift information necessary to perform a current data transfer operation, second storage means for storing second information necessary for a next data transfer operation to be initiated after completion of the current data transfer operation, execution means for performing the data transfer in response to the data transfer request by use of the first information, and means for causing the execution means to perform the data transfer by use of the second information and for generating an interrupt request to CPU when the number of transferred data reaches the number of data to be transferred by use of the first information, so that the execution means performs the data transfer in response to a subsequent data transfer request by use of the second information. <IMAGE></p> |
