发明名称 READ ONLY SEMICONDUCTOR MEMORY
摘要 PURPOSE:To reduce an area necessary to form a column gate of a transmission MIS transistor and to make the parasitic capacity of a selecting line uniform by selecting (n) pieces of data lines by the same selecting line, and employing the transistor for transmitting data to (m) pieces of common data lines. CONSTITUTION:When selecting line Y1 of selecting lines Y1 and Y2 becomes an 'H' level, data of a data line BL1 or BL2 is transmitted to a common data line DB1 or DB2 through a transmission N-channel MIS transistor Q1 or Q2 connected at a gate to the line Y1. Since two common data lines of a column gate of a transmitting MIS transistor are employed, the gates of the transistors Q1 and Q2, Q3 and Q4 can be connected to the same selecting line, and the number of contact holes can be reduced by half.
申请公布号 JPH043977(A) 申请公布日期 1992.01.08
申请号 JP19900104795 申请日期 1990.04.20
申请人 SEIKO EPSON CORP 发明人 ITOMI NOBORU
分类号 H01L27/112;H01L21/8246 主分类号 H01L27/112
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